vanCleemput, W. M. (1979) Hierarchical Design for VLSI: Problems and Advantages. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 259-274. https://resolver.caltech.edu/CaltechCONF:20120507-125409264
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Abstract
This paper describes the hierarchical design process for VLSI circuits and discusses the potential benefits and disadvantages.
| Item Type: | Book Section | ||||||
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| Record Number: | CaltechCONF:20120507-125409264 | ||||||
| Persistent URL: | https://resolver.caltech.edu/CaltechCONF:20120507-125409264 | ||||||
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| Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | ||||||
| ID Code: | 210 | ||||||
| Collection: | CaltechCONF | ||||||
| Deposited By: | Kristin Buxton | ||||||
| Deposited On: | 07 Aug 2012 16:57 | ||||||
| Last Modified: | 03 Oct 2019 22:50 |
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