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The Rolf of Test Chips in Coordinating Logic and Circuit Design and Layout Aids for VLSI

Buehler, Martin G. and Linholm, Loren W. (1981) The Rolf of Test Chips in Coordinating Logic and Circuit Design and Layout Aids for VLSI. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 135-151. https://resolver.caltech.edu/CaltechCONF:20120508-135820383

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Abstract

This paper emphasizes the need for multipurpose test chips and comprehensive procedures for use in supplying accurate input data to both logic and circuit simulators and chip layout aids. It is shown that the location of test structures within test chips is critical in obtaining representative data, because geometrical distortions introduced during the photomasking process can lead to significant intrachip parameter variations. In order to transfer test chip designs quickly, accurately, and economically, a commonly accepted portable chip layout notation and commonly accepted parametric tester language are needed. In order to measure test chips more accurately and more rapidly, parametric testers with improved architecture need to be developed in conjunction with innovative test structures with on-chip signal conditioning.


Item Type:Book Section
Additional Information:Contribution of the National Bureau of Standards, not subject to copyright. The authors are indebted to Charles Wilson, Tom Leedy, and others for their insights into the needs for parametric data for circuit simulators. The authors appreciate Gary Carver's contribution of the integrated gated-diode electrometer design as shown in figure 8 and the critical reviews of Barry Bell, Murray Bullis, and Christoph Witzgall.
Record Number:CaltechCONF:20120508-135820383
Persistent URL:https://resolver.caltech.edu/CaltechCONF:20120508-135820383
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http://resolver.caltech.edu/CaltechAUTHORS:20120502-113421018PublisherUNSPECIFIED
Usage Policy:Contribution of the National Bureau of Standards, not subject to copyright.
ID Code:233
Collection:CaltechCONF
Deposited By: Kristin Buxton
Deposited On:09 May 2012 22:50
Last Modified:03 Oct 2019 22:50

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