Séquin, Carlo H. (1979) Single-Chip Computers, the New VLSI Building Blocks. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 435-445. https://resolver.caltech.edu/CaltechCONF:20120504-141716721
|
PDF
- Published Version
See Usage Policy. 2MB |
Use this Persistent URL to link to this item: https://resolver.caltech.edu/CaltechCONF:20120504-141716721
Abstract
Current trends in the design of general purpose VLSI chips are analyzed to explore what a truly modular, general-purpose component for digital computing systems might look like in the mid 1980's. It is concluded that such a component would be a complete single-chip computer, in which the hardware for effective interprocessor communication has been designed with the architecture of the overall multiprocessor system in mind. Computation and communication are handled by separate processors in such a manner, that both can be performed simultaneously with full efficiency. This paper then describes relevant features of X-TREE, a research project which addresses the question how the power of VLSI of the next decade can best be used to build general purpose computing systems of arbitrary size. In X-TREE, a general VLSI component realizable in the mid 1980's is defined, and its interconnection into a hierarchical tree-structured network is studied. The overall architecture, communications issues and the blockdiagram of the modular component used are discussed.
Item Type: | Book Section | ||||||
---|---|---|---|---|---|---|---|
Additional Information: | The author would like to point out that project X-TREE is a "tightly coupled" team effort of our Architecture Group in the Computer Science Division at Berkeley, including Profs. Despain and Patterson, and several graduate students, and that it is almost impossible to determine the specific contributions of each member of the team. Particular thanks go to Al Despain and Dave Patterson for their suggestions, comments and careful review of this manuscript. This study was sponsored in part by the Joint Services Electronics Program, Contract F44620-76-C-0100. | ||||||
Funders: |
| ||||||
Other Numbering System: |
| ||||||
Record Number: | CaltechCONF:20120504-141716721 | ||||||
Persistent URL: | https://resolver.caltech.edu/CaltechCONF:20120504-141716721 | ||||||
Related URLs: |
| ||||||
Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | ||||||
ID Code: | 178 | ||||||
Collection: | CaltechCONF | ||||||
Deposited By: | Kristin Buxton | ||||||
Deposited On: | 08 Aug 2012 22:22 | ||||||
Last Modified: | 03 Oct 2019 22:50 |
Repository Staff Only: item control page