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A Subnanosecond LSI Family for Mainframe Technology

Muller, H. H. and Stopper, H. and Tam, R. K. (1979) A Subnanosecond LSI Family for Mainframe Technology. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 105-112.

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A subnanosecond LSI family is defined for next generation mainframes. It employs distributed on-chip regulation to reduce system power supply cost, stacked structures for delay-power improvement, on-chip test/diagnostic monitors and signature circuits to improve system maintainability.

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Computer Science Technical Report3340
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ID Code:181
Deposited By: Kristin Buxton
Deposited On:08 Aug 2012 20:12
Last Modified:03 Oct 2019 22:50

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