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Bristle Blocks: A Silicon Compiler

Johannsen, Dave (1979) Bristle Blocks: A Silicon Compiler. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 303-310. https://resolver.caltech.edu/CaltechCONF:20120504-150731850

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Abstract

Standard LSI Design Automation systems are database management systems that aid the circuit designer by organizing the collection of submodules that comprise a chip. This type of file system usually does not aid in the actual computation of silicon layout, and can hinder a designer with program constraints that have little or nothing to do with silicon constraints. The Bristle Block system is an attempt to create a silicon compiler that will perform the majority of the implementation computation while placing a minimum set of constraints on the designer. The goal of the Bristle Block system is to produce an entire LSI mask set from a single page, high level description of the integrated circuit.


Item Type:Book Section
Subject Keywords:[1) Mead, Carver A., and Conway, Lynn "An Introduction to VLSI Systems," limited printing, 1978 [2] Ayres, Ronald, "ICL Reference Manual," SSP File # 1364, CalTech, 1978
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Computer Science Technical Report3340
Record Number:CaltechCONF:20120504-150731850
Persistent URL:https://resolver.caltech.edu/CaltechCONF:20120504-150731850
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Usage Policy:No commercial reproduction, distribution, display or performance rights in this work are provided.
ID Code:184
Collection:CaltechCONF
Deposited By: Kristin Buxton
Deposited On:08 Aug 2012 20:28
Last Modified:03 Oct 2019 22:50

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