Smith, David R. and Chan, Douglas (1981) Communications for Next Generation single chip computers. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 555-585. https://resolver.caltech.edu/CaltechCONF:20120508-102133034
|
PDF
- Published Version
See Usage Policy. 4MB |
Use this Persistent URL to link to this item: https://resolver.caltech.edu/CaltechCONF:20120508-102133034
Abstract
It is the thesis of this report that much of what is presently thought to require specialized VLSI functions might instead be achieved by combinations of fast general purpose single chip computers with upgraded communication facilities. To this end, the characteristics of applications of this nature are first surveyed briefly and some working principles established. In the light of these, three different chip philosophies are explored in some detail. This study shows that some upgrading of typical single chip I/O will definitely be necessary, but that this upgrading does not have to be complex and that true multiprocessor-multibus operation could be achieved without excessive cost.
Item Type: | Book Section | ||||||
---|---|---|---|---|---|---|---|
Additional Information: | Supported by General Instrument Corporation. | ||||||
Funders: |
| ||||||
Record Number: | CaltechCONF:20120508-102133034 | ||||||
Persistent URL: | https://resolver.caltech.edu/CaltechCONF:20120508-102133034 | ||||||
Related URLs: |
| ||||||
Usage Policy: | No commercial reproduction, distribution, display or performance rights in this work are provided. | ||||||
ID Code: | 220 | ||||||
Collection: | CaltechCONF | ||||||
Deposited By: | Kristin Buxton | ||||||
Deposited On: | 07 Aug 2012 16:53 | ||||||
Last Modified: | 03 Oct 2019 22:50 |
Repository Staff Only: item control page