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Jump to: 1981 | 1979
Number of items: 69.

1981

Buric, Misha R. and Mead, Carver A. (1981) Bit-Serial Inner Product Processors in VLSI. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 155-164. https://resolver.caltech.edu/CaltechCONF:20120508-140618414

Browning, Sally A. and Seitz, Charles L. (1981) Communication in a Tree Machine. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 509-526. https://resolver.caltech.edu/CaltechCONF:20120508-143029685

Allen, Phillip E. and Cantrell, William H. (1981) Considerations for an Analog Four Quadrant SC Multiplier. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 313-217. https://resolver.caltech.edu/CaltechCONF:20120508-142315429

Conway, Lynn A. (1981) THE MPC ADVENTURES: Experiences with the Generation of VLSI Design and Implementation Methodologies. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 5-27. https://resolver.caltech.edu/CaltechCONF:20120508-135204801

Scheffer, Louis K. (1981) A Methodology for Improved Verification of VLSI Designs without Loss of Area. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 299-309. https://resolver.caltech.edu/CaltechCONF:20120508-134713504

Mead, Carver and Rem, Martin (1981) Minimum Propagation Delays in VLSI. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 433-439. https://resolver.caltech.edu/CaltechCONF:20120508-140116957

Tsividis, Yannis P. and Antoniadis, Dimitri A. (1981) A Multiproject Chip Approach to the Teaching of Analog MOS LSI and VLSI. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 355-371. https://resolver.caltech.edu/CaltechCONF:20120508-143716343

Rem, Martin and Mead, Carver (1981) A Notation for Designing Restoring Logic Circuitry in CMOS. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 399-411. https://resolver.caltech.edu/CaltechCONF:20120508-142455789

Budzinski, Rob and Linn, John and Thatte, Satish (1981) A Restructurable Integrated Circuit for Implementing Programmable Digital Systems. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 481-508. https://resolver.caltech.edu/CaltechCONF:20120508-142740335

Buehler, Martin G. and Linholm, Loren W. (1981) The Rolf of Test Chips in Coordinating Logic and Circuit Design and Layout Aids for VLSI. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 135-151. https://resolver.caltech.edu/CaltechCONF:20120508-135820383

Penfield, Paul, Jr. and Rubinstein, Jorge (1981) Signal Delay in RC Tree Networks. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 269-283. https://resolver.caltech.edu/CaltechCONF:20120508-141912762

Krishnan, M. S. (1981) A Structured Approach to VLSI Layout Design. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 413-432. https://resolver.caltech.edu/CaltechCONF:20120508-141651390

Johnsson, Lennart and Weiser, Uri and Cohen, Danny and Davis, Alan L. (1981) Towards a Formal Treatment of VLSI Arrays. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 375-398. https://resolver.caltech.edu/CaltechCONF:20120508-133029898

Rideout, V. Leo (1981) Trends in Silicon Processing. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 65-110. https://resolver.caltech.edu/CaltechCONF:20120507-115627174

Gajski, Daniel D. and Bilgory, Avinoam and Luhukay, Joseph (1981) Algorithmic Layout of Gate Macros. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 237-252. https://resolver.caltech.edu/CaltechCONF:20120507-160905572

Liu, K. Y. (1981) Architecture for VLSI Design of Ree-Solomon Encoders. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 539-553. https://resolver.caltech.edu/CaltechCONF:20120508-113437359

Smith, David R. and Chan, Douglas (1981) Communications for Next Generation single chip computers. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 555-585. https://resolver.caltech.edu/CaltechCONF:20120508-102133034

Shaver, D. C. (1981) Electron Beam Testing and Restructuring of Integrated Circuits. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 111-126. https://resolver.caltech.edu/CaltechCONF:20120508-102529066

Wetlesen, Gunnar A. (1981) Fast Turnaround Fabrication for Custom VLSI. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 45-53. https://resolver.caltech.edu/CaltechCONF:20120508-103555708

Ackland, Bryan and Weste, Neil (1981) Functional Verification in an Interactive Symbolic IC Design Environment. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 285-298. https://resolver.caltech.edu/CaltechCONF:20120507-153514157

Hayes, John P. (1981) A Logic Design Theory for VLSI. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 455-476. https://resolver.caltech.edu/CaltechCONF:20120508-111721911

Hoffman, Gordon B. (1981) Longer Term Directions for Semi-Custom VLSI. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 55-61. https://resolver.caltech.edu/CaltechCONF:20120508-103200574

Cohen, Danny and Lewicki, George (1981) MOSIS - The ARPA Silicon Broker. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 29-44. https://resolver.caltech.edu/CaltechCONF:20120507-161256758

Cherry, James J. and Roylance, Gerald L. (1981) A One Transistor RAM for MPC Projects. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 329-341. https://resolver.caltech.edu/CaltechCONF:20120508-103916312

Lin, Chong Ming (1981) PLA Design in NAND Structure. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 343-354. https://resolver.caltech.edu/CaltechCONF:20120507-154030220

Hennessy, John (1981) SLIM: A Language for Microcode Description and Simulation in VLSI. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 253-267. https://resolver.caltech.edu/CaltechCONF:20120508-103155488

Carroll, Christopher R. (1981) A Smart Memory Array Processor for Two Layer Path Finding. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 165-195. https://resolver.caltech.edu/CaltechCONF:20120507-155151454

Seiler, Larry (1981) Special Purpose Hardware for Design Rule Checking. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 197-216. https://resolver.caltech.edu/CaltechCONF:20120507-152701606

Martin, Alain J. (1981) The Torus: An Exercise in Constructing a Processing Surface. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 527-537. https://resolver.caltech.edu/CaltechCONF:20120507-152709316

Chazelle, B. M. and Monier, L. M. (1981) Towards More Realistic Models of Computation for VLSI. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 441-453. https://resolver.caltech.edu/CaltechCONF:20120507-153058673

Frank, Edward H. and Sproull, Robert F. (1981) Two Timing Samplers. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 127-134. https://resolver.caltech.edu/CaltechCONF:20120508-102909138

Tanner, John E. and Raibert, Marc H. and Eskenazi, Raymond (1981) A VLSI Tactile Sensing Array Computer. In: Proceedings of the Second Caltech Conference on Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 217-233. https://resolver.caltech.edu/CaltechCONF:20120508-103910815

1979

Kahn, Hilary J. and Burston, A. K. and Kinniment, D. J. (1979) ADL: An Hierarchical Logic Design Language. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 327-336. https://resolver.caltech.edu/CaltechCONF:20120504-160215974

Moore, Gordon E. (1979) Are We Really Ready for VLSI^2? In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 3-14. https://resolver.caltech.edu/CaltechCONF:20120504-153941374

Thompson, C. D. (1979) Area-Time Complexity for VLSI. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 495-508. https://resolver.caltech.edu/CaltechCONF:20120504-143038397

Johannsen, Dave (1979) Bristle Blocks: A Silicon Compiler. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 303-310. https://resolver.caltech.edu/CaltechCONF:20120504-150731850

Magó, Gyula A. (1979) A Cellular, Language Directed Computer Architecture. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 447-452. https://resolver.caltech.edu/CaltechCONF:20120504-155112153

Chaney, Thomas J. and Rosenberger, Fred U. (1979) Characterization and Scaling of MOS Flip Flop Performance in Synchronizer Applications. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 357-374. https://resolver.caltech.edu/CaltechCONF:20120507-124118999

Browning, Sally A. (1979) Computations on a Tree of Processors. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 453-478. https://resolver.caltech.edu/CaltechCONF:20120507-120526748

Sasaki, Tateaki (1979) A Computer Study of Electron-Electron Interaction in high Density Electron Beams. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 125-137. https://resolver.caltech.edu/CaltechCONF:20120507-123453903

Leyking, L. W. (1979) Data Base Considerations for VLSI. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 275-301. https://resolver.caltech.edu/CaltechCONF:20120504-162853420

Davis, A. L. (1979) A Data-Drive Machine Architecture Suitable for VLSI Implementation. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 479-494. https://resolver.caltech.edu/CaltechCONF:20120504-133310742

Mohsen, Amr (1979) Device and Circuit Design for VLSI. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 31-54. https://resolver.caltech.edu/CaltechCONF:20120504-133742355

Guibas, L. J. and Kung, H. T. and Thompson, C. D. (1979) Direct VLSI Implementation of Combinatorial Algorithms. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 509-525. https://resolver.caltech.edu/CaltechCONF:20120504-162659203

vanCleemput, W. M. (1979) Hierarchical Design for VLSI: Problems and Advantages. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 259-274. https://resolver.caltech.edu/CaltechCONF:20120507-125409264

Sites, Richard L. (1979) How to Use 1000 Registers. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 527-532. https://resolver.caltech.edu/CaltechCONF:20120504-163707650

Hon, Robert W. (1979) Implementing VLSI Systems in a Research Environment. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 139-145. https://resolver.caltech.edu/CaltechCONF:20120507-120045692

Kung, H. T. (1979) Let's Design Algorithms for VLSI Systems. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 65-90. https://resolver.caltech.edu/CaltechCONF:20120504-160658605

Denny, W. Michael and Buley, Ernest R. and Hatt, Earl (1979) Logic-Enhanced Memories: An Overview and Some Examples of Their Application to a Radar Tracking Problem. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 173-186. https://resolver.caltech.edu/CaltechCONF:20120507-124109761

Rem, Martin (1979) Mathematical Aspects of VLSI Design. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 55-63. https://resolver.caltech.edu/CaltechCONF:20120504-163239621

Locanthi, Bart (1979) Object Oriented Raster Displays. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 215-225. https://resolver.caltech.edu/CaltechCONF:20120504-140731319

Raffel, J. I. (1979) On the Use of Nonvolatile Programming Links for Restructurable VLSI. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 95-104. https://resolver.caltech.edu/CaltechCONF:20120504-161821703

Allen, Jonathan (1979) Requirements for a Research-oriented IC Design System. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 253-258. https://resolver.caltech.edu/CaltechCONF:20120504-162414324

Seitz, Charles L. (1979) Self-Timed VLSI Systems. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 345-355. https://resolver.caltech.edu/CaltechCONF:20120504-144846690

Ayres, Ron (1979) Silicon Compilation - A Hierarchical Use of PLAs. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 311-326. https://resolver.caltech.edu/CaltechCONF:20120507-120348531

Huber, Robert J. (1979) A Simple Two-Layer Aluminum Metal Process for VLSI. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 113-123. https://resolver.caltech.edu/CaltechCONF:20120507-115757571

Séquin, Carlo H. (1979) Single-Chip Computers, the New VLSI Building Blocks. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 435-445. https://resolver.caltech.edu/CaltechCONF:20120504-141716721

Steele, Guy Lewis, Jr. and Sussman, Gerald Jay (1979) Storage Management in a LISP-based Microprocessor. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 227-241. https://resolver.caltech.edu/CaltechCONF:20120504-154145765

Wolf, E. D. (1979) Submicron Fabrication. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, p. 30. https://resolver.caltech.edu/CaltechCONF:20120504-151745242

Muller, H. H. and Stopper, H. and Tam, R. K. (1979) A Subnanosecond LSI Family for Mainframe Technology. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 105-112. https://resolver.caltech.edu/CaltechCONF:20120504-144406140

Stucki, M. J and Cox, J. R, Jr. (1979) Synchronization Strategies. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 375-393. https://resolver.caltech.edu/CaltechCONF:20120504-163401189

Leiserson, Charles E. (1979) Systolic Priority Queues. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 199-214. https://resolver.caltech.edu/CaltechCONF:20120503-130458130

Patil, Suhas S. (1979) Timing Considerations in Logic Arrays and Their Importance to Self Timed Digital Circuits. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, p. 428. https://resolver.caltech.edu/CaltechCONF:20120507-120804115

Sutherland, Ivan E. and Molnar, Charles E. and Sproull, Robert F. and Mudge, J. Craig (1979) The Trimosbus. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA. (Unpublished) https://resolver.caltech.edu/CaltechCONF:20120504-160956776

Lattin, Bill (1979) VLSI Design Methodology: The Problem of the 80's for Microprocessor Design. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 247-252. https://resolver.caltech.edu/CaltechCONF:20120504-141256416

Cohen, Danny and Tyree, Vance (1979) VLSI System for SAR Processing. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 151-171. https://resolver.caltech.edu/CaltechCONF:20120504-145717471

Schorr, Herbert (1979) VLSI and High Performance Computers. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, p. 433. https://resolver.caltech.edu/CaltechCONF:20120504-155423103

Mead, Carver A. (1979) VLSI and Technological Innovation. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 15-28. https://resolver.caltech.edu/CaltechCONF:20120504-142807034

Lea, R. M. and Sreetharan, M. (1979) WSI Distributed Logic Memories. In: Proceedings of the Caltech Conference On Very Large Scale Integration. California Institute of Technology , Pasadena, CA, pp. 187-197. https://resolver.caltech.edu/CaltechCONF:20120504-160132955

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